Field of the Invention
The present invention relates to a liquid crystal display device and a method of manufacturing the same, and more particularly, to a liquid crystal display device capable of reducing the number of processing masks without forming a separate column spacer, and a method of manufacturing the same.
Discussion of the Related Art
Generally, liquid crystal display devices display images by adjusting light transmittance of a liquid crystal screen using an electric field. Such liquid crystal display devices are mainly divided into horizontal electric field applying type liquid crystal display devices and vertical electric field applying type liquid crystal display devices, depending on a direction of the electric field used to drive the liquid crystal screen.
A vertical electric field applying type liquid crystal display device includes a common electrode formed on an upper substrate and a pixel electrode formed on a lower substrate, and thus enables a liquid crystal panel of a twisted nematic (TN) mode to be driven due to a vertical electric field formed between the common electrode and the pixel electrode since the common electrode and the pixel electrode are disposed to face each other. Such the liquid crystal display device has an advantage in that the liquid crystal display device has a high aperture ratio, but has a drawback in that the liquid crystal display device has a narrow viewing angle.
A horizontal electric field applying type liquid crystal display device enables a liquid crystal panel of an in-plane switch (hereinafter referred to as ‘IPS’) mode to be driven due to a horizontal electric field formed between a common electrode and a pixel electrode disposed side by side on a lower substrate. Such the liquid crystal display device has an advantage in that the liquid crystal display device has a wide viewing angle.
Hereinafter, a related art horizontal electric field applying type liquid crystal display device will be described in detail. FIG. 1 is a perspective view illustrating a liquid crystal display panel of a horizontal electric field applying type, FIG. 2 is a plan view schematically illustrating a thin-film transistor array substrate shown in FIG. 1, and FIG. 3 is a cross-sectional view illustrating the liquid crystal display panel shown in FIG. 1.
As shown in FIG. 1, the related art horizontal electric field applying type liquid crystal display device includes a thin-film transistor array substrate 50, a color filter array substrate 60, and a liquid crystal layer 40 filled in a space between the thin-film transistor array substrate 50 and the color filter array substrate 60. Here, the thin-film transistor array substrate 50 and the color filter array substrate 60 have a predetermined space formed by a column spacer 70 interposed therebetween, and are bonded to face each other.
As shown in FIGS. 2 and 3, the thin-film transistor array substrate 50 includes a plurality of gate lines 2 and a plurality of data lines 4 formed crosswise on the lower substrate 1 to define a plurality of pixel regions, a thin-film transistor 30 formed at each of intersections of the plurality of gate lines 2 and the plurality of data lines 4, pixel and common electrodes 22 and 24 formed at each of the pixel regions to form a horizontal electric field, and a common line 26 connected to the common electrode 24.
The gate lines 2 serve to supply a gate signal to the gate electrode 6 of each of the thin-film transistors 30, the data lines 4 serve to supply a data signal to a pixel electrode 22 via each of the thin-film transistors 30. The common line 26 is formed side by side with the gate lines 2, with the pixel region interposed therebetween, to apply a reference voltage for driving a liquid crystal panel to the common electrode 24.
The thin-film transistor 30 charges the pixel electrode 22 with the data signal from the data lines 4 in response to the gate signal from the gate lines 2 so that the pixel electrode 22 is maintained in a charged state. For this purpose, the thin-film transistor 30 includes a gate electrode 6 connected to each of the gate lines 2, a source electrode 8 connected to each of the data lines 4, and a drain electrode 10 connected to the pixel electrode 22.
In addition, the thin-film transistor 30 further includes an active layer including a channel region formed between the source electrode 8 and the drain electrode 10 while overlapping each other with the gate electrode 6 and the gate insulating layer 12 interposed therebetween.
The pixel electrode 22 is connected to the drain electrode 10 of the thin-film transistor 30 via a contact hole 20 formed through a protective layer 18 and is formed on the pixel region. In particular, the pixel electrode 22 is formed between the common electrodes 24 so that the pixel electrode 22 is arranged side by side with the common electrodes 24.
The common electrode 24 is connected to the common line 26, and formed on the pixel region. In particular, the common electrode 24 is formed on the pixel region to be parallel to the pixel electrode 22.
As shown in FIG. 3, the color filter array substrate 60 includes a color filter layer 34 formed on the upper substrate 11 to realize colors for the respective pixel regions, a black matrix layer 32 for preventing light leakage from boundaries of the respective pixel regions, an overcoat layer 36 for planarizing the upper substrate 11 having the color filter layer 34 and the black matrix layer 32 formed therein, and a column spacer 70 for constantly maintaining a cell gap on the overcoat layer 36.
Therefore, a horizontal electric field is formed between the pixel electrode 22 supplied with the data signal via the thin-film transistor 30 and the common electrode 24 supplied with the reference voltage via the common line 26. Liquid crystal molecules of the liquid crystal layer 40 filled between the thin-film transistor array substrate 50 and the color filter array substrate 60 rotates with dielectric anisotropy due to such a horizontal electric field. Transmittance of light transmitting the pixel region varies according to a degree of rotation of the liquid crystal molecules, thereby realizing an image.
Nine masks are required to manufacture such the related art liquid crystal display device.
Therefore, the related art liquid crystal display device has a drawback in that processes are complicated and manufacturing costs increase since the black matrix layer and the column spacer are formed and the 9 masks are used. In addition, the related art liquid crystal display device has a drawback in that an amount of liquid crystals used increases as a planarization process is performed using the overcoat layer.
In the related art horizontal electric field applying type liquid crystal display devices, a method in which a stacked body obtained by stacking color filter layers is used instead of a column spacer without separately forming the column spacer (see Korean Patent Application Publication No. 1996-0005176) has been developed. Also, a method in which a protective layer having a step coverage is used instead of a column spacer (see Korean Patent application Publication No. 2005-0053288) has been developed.
However, such related art methods have a drawback in that no column spacer is substantially formed.
First, when the column spacer is formed using the color filter layer as described in Korean Patent application Publication No. 1996-0005176, problems occur accordingly, as will described below.
Generally, since a liquid crystal display device having a cell gap of approximately 2.8 μm to 3.0 μm is required, and a threshold value (CD) of a column spacer functions as a frictional force with respect to the mobility of liquid crystals, the column spacer should be formed to a size of 10 μm to 15 μm.
However, when the column spacer is formed of a pigment of the color filter layer, a pattern having a thickness of approximately 20 μm or less may not be formed due to limitations of pigments in forming the pattern. In addition, when the color filter layers are stacked to form a column spacer, and an overcoat layer is formed on the stacked color filter layers, uniformity of the column spacer may be dramatically degraded.
That is, color filter layers should be formed on each pixel region by respectively depositing pigments of respective R, G and B color filter layers in a thickness of approximately 2 to 2.4 μm. The pigments of respective R, G and B color filter layers should be stacked on boundaries of the respective pixel regions to form a column spacer having a step coverage of approximately 3.5 μm so as to achieve a cell gap of approximately 2.8 μm to 3.0 μm. And an overcoat layer should be formed on the column spacer and the color filter layers to prevent eruption of the pigments of the color filter layers. But, the step coverage of the column spacer decreases by approximately 1 to 1.5 μm due to planarization characteristics of the overcoat layer material. As a result, the finally formed column spacer has a step coverage of approximately 2 to 2.5 μm. Therefore, the overcoat layer may not serve as the column spacer, and the uniformity of the column spacer may also be dramatically degraded.
Second, when the column spacer is formed using the protective layer as described in Korean Patent Application Publication No. 10-2005-0053288, problems occur accordingly, as will described below.
In the liquid crystal display device as described above, the organic protective layer should be deposited to a thickness of approximately 6.5 μm to have a desired cell gap of approximately 2.8 μm to 3.0 μm.
That is, the thickness of the organic protective layer serving as a low dielectric is required to be greater than or equal to approximately 2.0 μm, the step coverage of the column spacer is required to be approximately 3.5 μm to have a cell gap of approximately 2.8 μm to 3.0 μm, and a thickness of the organic protective layer which is lost when the organic protective layer is etched to form gate line pad contact holes, data line pad contact holes, and source/drain contact holes is in a range of approximately 0.8 μm to 1.0 μm. Therefore, the organic protective layer should be deposited to a thickness of approximately 6.5 μm to form a column spacer using the organic protective layer.
However, the organic protective layer can be coated to a thickness of up to 6 μm using existing techniques, and the substantial thickness of the organic protective layer is in a range of approximately 3 μm to 4 μm for the liquid crystal display devices produced so far.
In addition, when the organic protective layer is formed to a thickness of 6 μm or more, and gate line pad contact holes, data line pad contact holes and source/drain contact holes are formed using a half-tone mask, threshold values of the contact holes may be significantly lowered, compared to when the organic protective layer may be formed to a thickness of approximately 3 μm to 4 μm to form the contact holes, which results in loose contact between layers.
Third, when the color filter layers are stacked to form the column spacer, or the organic protective layer is etched to form the column spacer as described above, the column spacer moves due to bending of a liquid crystal display panel. In this instance, scratches may occur on an alignment film formed between facing substrates as the column spacer is moving.
When the scratches occur on the alignment film as described above, light leakage into a region other than a black matrix layer may occur, resulting in a red-eye effect.